As an AD converter for converting an analog signal into a digital signal, a successive approximation type AD converter is known. The successive approximation type AD converter is preferably used for a measurement apparatus and an analyzer requiring a high precision, and for a medical device, since being able to realize the digital conversion in high precision.
The successive approximation type AD converter compares an analog signal converted by a DAC (a local analog signal) with an input analog signal, and converts a digital signal into an analog signal again according to the comparison result by using the DAC and compares the converted analog signal with the input analog signal. The successive approximation type AD converter can output a digital signal based on an analog signal by repeating this operations.
In these years, digital conversion with high resolution is demanded, and thus the number of bits of conversion resultant digital data is increasing. For this reason, the successive approximation type AD converter includes a main DAC (digital-to-analog converter) for converting upper bits of digital data into analog data, and a sub DAC for converting the lower bits of the digital data into analog data, and thus realizes the digital conversion with high resolution. A low power consumption apparatus with high accuracy which is superior in performance such as an S/N ratio (Signal to Noise ratio) and THD (Total Harmonic Distortion) can be realized by using the successive approximation type AD converter.
FIG. 1 is a conventional diagram showing a configuration of the successive approximation type AD converter described in Patent Literature 1 (JP 2004-260263A). Referring to FIG. 1, the conventional successive approximation type AD converter will be described. In the successive approximation type AD converter, a voltage resistance—dividing type DAC using a resistance string and an electric charge distribution type DAC using a capacitance array are as the main DAC and the sub DAC. When a combination of the main DAC and the sub DAC is described in order of the main DAC—the sub DAC, successive approximation type AD converters employing the voltage resistance—dividing type DAC (main)—the voltage resistance—dividing type DAC (sub), the voltage resistance—dividing type DAC (main)—the electric charge distribution type DAC (sub), the electric charge distribution type DAC (main)—the electric charge distribution type DAC (sub), and the electric charge distribution type DAC (main)—the voltage resistance—dividing type DAC (sub) are known. Among them, the electric charge distribution type DAC (main)—the voltage resistance—dividing type DAC (sub) (C-R type DAC) having a superior characteristic in the performance and size is preferably used.
The successive approximation type AD converter shown in FIG. 1 includes the C-R type DAC having a voltage resistance—dividing type DAC 51 and an electric charge distribution type DAC 52, a comparator 60, and a comparison control circuit 70. The C-R type DAC converts digital data from the comparison control circuit 70 into analog data and outputs the analog data to the comparator 60. In this case, the electric charge distribution type DAC 52 converts upper bits of the digital data into analog data, and the voltage resistance—dividing type DAC 51 converts lower bits of the digital data into analog data.
The electric charge distribution type DAC 52 includes a switch circuit 520 for controlling connection between a capacitance array and a reference voltage Vref or an output voltage of the resistance—dividing type DAC 51 in accordance with digital data. The switch circuit 520 carries out a sampling control of an input analog signal and an electric charge distribution control in the electric charge distribution type DAC 52 in accordance with digital data from the comparison control circuit 70.
When sampling the input analog signal, the switch circuit 520 stores an electric charge according to the input analog signal in the capacitance array by connecting the input terminal of the analog signal and the capacitance array. After the sampling of the input analog signal, the switch circuit 520 controls an amount of the electric charge stored in the electric charge distribution type DAC 52 trough a switching operation according to the upper 4 bits of the digital data. Meanwhile, in the voltage resistance—dividing type DAC 51, a voltage resistance dividing terminal selected in accordance with the lower 4 bits of the digital data is connected to the capacitance array. In this manner, a difference between an analog signal corresponding to the 8-bit digital data and the sampled input analog signal (hereinafter, to be referred to as a local analog signal) is generated.
The local analog signal is supplied to the comparator 60. The comparator 60 compares a ground voltage (GND) with a voltage of the local analog signal, and outputs the comparison result to the comparison control circuit 70. In this manner, the analog signal corresponding to the digital data and the comparison result of the voltage level of the input analog signal are outputted to the comparison control circuit 70.
The comparison control circuit 70 sets the digital data on the basis of the inputted comparison result. As described above, the successive approximation type AD converter is able to set the digital signal corresponding to the sampled analog signal (a sample value) by repeating the comparison operation and the digital data setting. In this case, the digital data setting is carried out from the MSB (Most Significant Bit) to the LSB (Least Significant Bit) in turn.